{"id":60,"date":"2025-05-23T17:04:36","date_gmt":"2025-05-23T09:04:36","guid":{"rendered":"https:\/\/tekdf.com\/?page_id=60"},"modified":"2026-07-13T02:25:54","modified_gmt":"2026-07-12T18:25:54","slug":"product","status":"publish","type":"page","link":"https:\/\/tekdf.com\/index.php\/product\/","title":{"rendered":"\u4ea7\u54c1\u4ecb\u7ecd"},"content":{"rendered":"\n
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FPGA\u5f00\u53d1\u677f<\/h2>\n\n\n\n
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\"\"<\/figure>\n\n\n\n

Smart-SDR<\/a><\/h3>\n\n\n\n

70 MHz~6 GHz\uff0c2\u901a\u9053\uff0cZYNQ-7035\uff0cFPGA Verilog\u539f\u578b\u5f00\u53d1<\/p>\n<\/div>\n<\/div>\n\n\n\n

\n
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\u76f8\u5e72\u63a5\u6536\u673a\u5f00\u53d1\u5e73\u53f0<\/h2>\n\n\n\n
\n
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\"\"<\/figure>\n\n\n\n

KrakenSDR<\/a> <\/h3>\n\n\n\n

\u9891\u7387\uff1a24 MHz \u2013 1766 MHz\uff0c\u901a\u9053\u5e26\u5bbd<\/strong>\uff1a2.56 MHz\uff0c\u901a\u9053\u6570\uff08RX Channels\uff09<\/strong>\uff1a5\uff0c\u672c\u632f\u7a33\u5b9a\u5ea6\uff08Oscillator Stability\uff09<\/strong>\uff1a1 PPM\uff0c\uffe56,500<\/p>\n<\/div>\n\n\n\n

<\/div>\n<\/div>\n<\/div>\n<\/div>\n<\/div>\n\n\n\n
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AI-RAN\uff1a6G\u5f00\u53d1\u5e73\u53f0<\/h2>\n\n\n\n
\n
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\"\"<\/figure>\n\n\n\n

Sionna \u5f00\u53d1\u5e73\u53f0<\/a><\/h3>\n\n\n\n

\u57fa\u4e8eOAI\u548cUSRP B210\uff0c\u5177\u5907\u795e\u7ecf\u7f51\u7edc\u63a5\u6536\u673a\u7b49\u5165\u95e8\u7ea75G\/6G\u7b97\u6cd5\u5f00\u53d1\u5e73\u53f0<\/p>\n<\/div>\n\n\n\n

\n
\"\"<\/figure>\n\n\n\n

AI-RAN Aerial Testbed \u5f00\u53d1\u5e73\u53f0<\/a><\/h3>\n\n\n\n

\u57fa\u4e8e NVIDIA Aerial\u2122 CUDA-Accelerated RAN \u7684\u5546\u7528\u7ea7\u522b\u7684\u79d1\u7814\u5e73\u53f0\uff0c\u52a9\u529b\u79d1\u7814\u6210\u679c\u65e0\u7f1d\u5728\u5de5\u4e1a\u754c\u90e8\u7f72<\/p>\n<\/div>\n\n\n\n

\n
\"\"<\/figure>\n\n\n\n

AI-RAN AODT \u5f00\u53d1\u5e73\u53f0<\/h3>\n\n\n\n

\u6570\u5b57\u5b6a\u751f\u5e73\u53f0\uff0c\u52a9\u529b6G\u79d1\u7814<\/p>\n<\/div>\n<\/div>\n<\/div>\n\n\n\n

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\u6570\u636e\u94fe\u6559\u5b66\u79d1\u7814\u5e73\u53f0<\/h2>\n\n\n\n
\n
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\"\"<\/figure>\n\n\n\n

\u6570\u636e\u94fe Link16<\/h3>\n\n\n\n

\u57fa\u4e8e\u8f6f\u4ef6\u65e0\u7ebf\u7535\u5b9e\u73b0\u7684Link16\u5e73\u53f0<\/p>\n<\/div>\n\n\n\n

\n
\"\"<\/figure>\n\n\n\n

\u6570\u636e\u94fe Link11<\/h3>\n\n\n\n

\u57fa\u4e8e\u8f6f\u4ef6\u65e0\u7ebf\u7535\u5b9e\u73b0\u7684Link11\u5e73\u53f0<\/p>\n<\/div>\n\n\n\n

\n
\"\"<\/figure>\n\n\n\n

\u6570\u636e\u94fe Link4A<\/h3>\n\n\n\n

\u57fa\u4e8e\u8f6f\u4ef6\u65e0\u7ebf\u7535\u5b9e\u73b0\u7684Link4A\u5e73\u53f0<\/p>\n<\/div>\n<\/div>\n<\/div>\n\n\n\n

<\/p>\n","protected":false},"excerpt":{"rendered":"

FPGA\u5f00\u53d1\u677f Smart-SDR 70 MHz~6 GHz\uff0c2\u901a\u9053\uff0cZYNQ-7035\uff0cFPGA Veril […]<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-60","page","type-page","status-publish","hentry"],"jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/tekdf.com\/index.php\/wp-json\/wp\/v2\/pages\/60","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/tekdf.com\/index.php\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/tekdf.com\/index.php\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/tekdf.com\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/tekdf.com\/index.php\/wp-json\/wp\/v2\/comments?post=60"}],"version-history":[{"count":26,"href":"https:\/\/tekdf.com\/index.php\/wp-json\/wp\/v2\/pages\/60\/revisions"}],"predecessor-version":[{"id":2121,"href":"https:\/\/tekdf.com\/index.php\/wp-json\/wp\/v2\/pages\/60\/revisions\/2121"}],"wp:attachment":[{"href":"https:\/\/tekdf.com\/index.php\/wp-json\/wp\/v2\/media?parent=60"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}