东枫科技

标签： USRP

  • USRP X300

    783144-01 | USRP X300 (KINTEX7-325T FPGA, 2 CHANNELS, 10GIGE AND PCIE BUS) $ 8,544.00 USD

    The Ettus Research USRP X300 is a high-performance, scalable software-defined radio (SDR) platform for designing and deploying next-generation wireless communications systems.

    Overview

    The Ettus Research USRP X300 is a high-performance, scalable software-defined radio (SDR) platform for designing and deploying next-generation wireless communications systems. The hardware architecture combines two extended-bandwidth daughterboard slots covering DC – 6 GHz with up to 160 MHz of baseband bandwidth, multiple high-speed interface options (PCIe, dual 10 GigE, dual 1 GigE), and a large user-programmable Kintex-7 FPGA in a convenient desktop or rack-mountable half-wide 1U form factor. In addition to providing best-in-class hardware performance, the open source software architecture of X300 provides cross-platform UHD driver support making it compatible with a large number of supported development frameworks, reference architectures, and open source projects.

    Operating SystemsLinuxWindows
    Development FrameworksGNU Radio
    Xilinx Vivado 2015.2 Design Suite

    Table 1: Operating systems, development frameworks, and reference applications

    High-Performance User-Programmable FPGA

    At the heart of the USRP X300, the XC7K325T FPGA provides high-speed connectivity between all major components within the device including radio frontends, host interfaces, and DDR3 memory.  The default FPGA core provided with UHD provides all of the functional blocks for digital down-conversion and up-conversion, fine-frequency tuning, and other DSP functions allowing it to be interchangeable with other USRP devices using the UHD architecture.  The large Kintex-7 FPGA provides additional space for developers to incorporate custom DSP blocks and is compatible with a large number of USRP-supported development frameworks, reference architectures, and open source projects.

    USRP N210USRP X300USRP X310
    FPGASpartan3 XC3SD3400AKintex 7-325TKintex 7-410T
    Logic Cells53k321k406k
    Memory2,268 Kb16,020 Kb28,620 Kb
    Multipliers1268401540
    Clock Rate100 MHz200 MHz200 MHz
    Streaming Bandwidth per Channel (16-bit)25 MS/s200 MS/s200 MS/s

    Table 2: FPGA resource comparison

    Multiple High-Speed Interface Options

    The USRP X300 provides multiple interface options.  Out of the box, 1 GigE provides a convenient way to get started. For extended bandwidth and lower latency applications such as PHY/MAC research, PCIe x4 provides an efficient bus for deterministic operation. Applications using network recorders or multiple processing nodes can be best served by the 10 GigE interface option.

    Additional Features- GPSDO, GPIO, 1 GB DDR3, Synchronization

    The X300 includes many additional features that facilitate wireless system development.  On-board 1GB DDR3 with flexible access through the FPGA reference design supplements the FPGA resources with buffering and data storage memory.  An optional internal GPSDO provides a high-accuracy frequency reference, and global timing alignment to within 50 ns when synchronized to the GPS system.  The external GPIO connector allows users to control external components such as amplifiers and switches, accept inputs like event triggers, and observe debug signals.  The USRP X300 also includes an internal JTAG adapter that allows FPGA developers to easily load and debug new FPGA images.

    Compatible RF Daughterboards: UBX, CBX, WBX, SBX, LFRX, LFTX, Basic TX/RX)

    Features

    • Two wide-bandwidth RF daughterboard slots
      • Up to 160MHz bandwidth each (UBX and TwinRX)
      • Daughterboard selection covers DC to 6 GHz
    • Large customizable Xilinx Kintex-7 FPGA for high-performance DSP (XC7K325T)
    • Multiple high-speed interfaces
      • Dual 10 Gigabit Ethernet – 2x RX at 200 MSPs per channel
      • Dual 10 Gigabit Ethernet – 4x RX at 80 MSPs per channel
      • PCIe Express (Desktop) – 200 MS/s Full Duplex
      • ExpressCard (Laptop) – 50 MS/s Full Duplex
      • Dual 1 Gigabit Ethernet – 25 MS/s Full Duplex
    • UHD architecture provides compatibility with
      • GNU Radio
      • C++/Python API
      • Amarisoft LTE 100
      • OpenBTS
      • Other third-party software and frameworks
    • Flexible clocking architecture
      • Configurable sample clock
      • Optional GPS-disciplined OCXO
      • Coherent operation with OctoClock and OctoClock-G
    • Compact and rugged half-wide 1U form factor for convenient desktop or rack mount usage
    • Digital I/O accessible on the front panel for custom control and interfacing from the FPGA

    Additional Resources

    Included in This Kit:

    • USRP X300
    • 1 Gigabit Ethernet Cable
    • SFP Adapter for 1 GigE
    • Power Supply
    • USB 2.0 Cable for Internal JTAG Adapter
    • Four SMA-Bulkhead Cables
    • Getting Started Guide

    Quotes and Sales

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  • USRP E320 (Board Only)

    786694-01 | USRP E320 (ZYNQ-7045, 2X2, 70 MHZ – 6 GHZ, BOARD ONLY) $8,334.00 USD

    The USRP E320 brings performance to embedded software defined radios by offering four times more FPGA resources compared to the USRP E31x devices.

    Overview

    The USRP E320 brings performance to embedded software defined radios by offering four times more FPGA resources compared to the USRP E31x devices. The USRP E320 also introduces improvements in streaming, synchronization, integration, fault-recovery, and remote management capability. This field deployable SDR continues to use the flexible 2×2 MIMO AD9361 transceiver from Analog Devices, which covers frequencies from 70 MHz – 6 GHz and provides up to 56 MHz of instantaneous bandwidth.

    The USRP E320 is available in both 3U board-only and fully enclosed form factor variants. The compact size of the USRP E320 is highly suitable for deployment as a mobile radio in manpacks or mounted on unmanned ariel vehicles.

    The open-source USRP Hardware Driver (UHD) API and RF Network-on-Chip (RFNoC) FPGA development framework reduce software development effort and integrate with a variety of industry-standard tools such as GNU Radio. Users can rapidly prototype and reliably deploy designs for a variety of SDR applications such as spectrum monitoring and analysis, base station and UE emulation, mobile radio, and UAV communication/detection.

    Baseband Processor

    The baseband processor uses the Xilinx Zynq-7045 SoC to deliver a large user-programmable FPGA for real-time and low-latency processing and a dual-core ARM CPU for stand-alone operation. Users can deploy applications directly on to the preinstalled embedded Linux operating system or stream samples to a host computer using high-speed interfaces such as 1 Gigabit Ethernet, 10 Gigabit Ethernet, and Aurora.

    Synchronization

    The USRP E320 has a flexible synchronization architecture with support for traditional SDR synchronization methods such as clock reference, PPS time reference, and GPSDO, which enable implementation of high channel count MIMO systems.

    Trusted Platform Module (TPM)

    The USRP E320 includes a Trusted Platform Module to enable security features such as file encryption. Due to product compliance restrictions on products with TPM (Trusted Platform Module) components to a few countries, the USRP E320 is available in two variants:

    • Standard variant with TPM (PN 786694-01)
    • Non-TPM variant (PN 786877-01)

    Features

    • Single-plane PCB
    • Remote management capability
    • Stand-alone (embedded) or host-based (network streaming) operation
    • Wide frequency range: 70 MHz to 6 GHz
    • Up to 56 MHz of instantaneous bandwidth
    • RX, TX filter bank
    • Xilinx Zynq-7045 SoC
      • Dual-core ARM Cortex-A9 800 MHz CPU with 1 GB DDR3 RAM
      • 7 Series FPGA with 2 GB DDR3 RAM
    • 1 SFP+ port (1 Gigabit Ethernet, 10 Gigabit Ethernet, Aurora)
    • 1 RJ45 port (1 GbE)
    • Clock reference 
    • PPS time reference
    • Built-in GPSDO 
    • 1 Type A USB host port 
    • 1 micro-USB port (serial console, JTAG) 
    • Trusted Platform Module v1.2 [1]
    • Watchdog timer
    • OpenEmbedded Linux
    • USRP Hardware Driver™ (UHD) open-source software API version 3.14.0 or later
    • RF Network on Chip (RFNoC™) FPGA development framework
    • Xilinx Vivado 2017.4 Design Suite (license not included)
    • GNU Radio support maintained by Ettus Research™ through GR-UHD, an interface to UHD distributed by GNU Radio

    [1] Due to product compliance restrictions on products with TPM (Trusted Platform Module) components to a few countries, the USRP E320 is available in two variants:

    • Standard variant with TPM (PN 786694-01)
    • Non-TPM variant (PN 786877-01)

    Customers in the following regions should select the non-TPM option (PN 786877-01) listed above: People’s Republic of China, Hong Kong, Russia, France, and Israel.

    [2] This kit does not include a DC power supply. Users can integrate third-party power supplies to meet their custom deployment needs or purchase the 12 V USRP power supply (783349-01)

    Block Diagram

    Additional Resources

    Included in This Kit:

    • USRP E320 board-only variant
    • Power supply mating connector (assembly required)[2]
    • RJ45 Ethernet cable
    • SFP+ to RJ45 adapter
    • Micro-USB cable
    • Imaged microSD Card
    • Board standoffs

    Quotes and Sales

    Email：sales@tekdf.com

    Wechat：dftech_info