东枫科技

标签： USRP X410

  • 招标技术参数：软件无线电 X410

    一、范围

    本文件规定了软件无线电开发装置采购的标准技术参数、使用环境条件、组件材料配置的项目需求及投标人响应等要求。本文件适用于软件无线电开发装置采购。

    二、标准技术参数

    技术参数特性表是XXX对采购设备的基础技术参数要求，在招投标过程中，投标人应该依据招标文件，对技术参数特性表中标准参数值进行响应，详见表1。

    序号技术参数名称单位项目需求值或表述投标人响应值
    1软件无线电装置主体
    1.1射频性能/4发4收，独立可调制。1 MHz到7.2 GHz,最高课调整至8 GHz 每通道不小于 400 MHz 带宽 
    1.2处理系统/四核 ARM Cortex-A53（1200 MHz）
    4 GB DDR4    		 
    1.3可编程逻辑单元/FPGA: RFSoC ZU28DR 2 × 4 GB DDR4 
    1.4适配软件/UHD version 4.1 or later RFNoC GNU Radio C/C++ Python OpenEmbedded Linux on A53 NI-USRP 20.8 or later LabVIEW 2020 or later LabVIEW FPGA 2020 or later Matlab R2022a 
    1.5时钟同步方式/REF IN (clock reference input) PPS IN (PPS time reference) TRIG IN/OUT GPSDO included OCXO included 
    1.6数字接口/2 QSFP28 (10/100 GbE, Aurora) 2 iPass+ zHD (cabled PCIe Gen3 x8)[2] Ethernet (1 GbE to PS) 2 USB-C (USB to PS, Console/JTAG) 2 HDMI (GPIO) 
    1.7输入电源/12 V DC, 16 A 最大 
    1.8尺寸体积/不大于29cm × 23 cm × 5cm 
    1.9ADC分辨率/12 bit 
    1.10DAC分辨率/14 bit 
    1.11频率步进/<1 Hz 
    1.12RF最大输出功率/不小于23 dBm 
    1.13频率准确度/OCXO (未锁定GPS) 2.5 ppm   OCXO (GPS驯服状态) 5 ppb 

  • USRP X410

    787272-01 | USRP X410 (4 TX/RX Channels, 400 MHz BW, Zynq US+ RFSoC ZU28DR) $ 29,950.00 USD

    The NI Ettus USRP X410 is a high-performance, multi-channel, Zynq US+ RFSoC based software defined radio (SDR) for designing and deploying next generation wireless systems.

    Overview

    The NI Ettus USRP X410 is a high-performance, multi-channel software-defined radio. The SDR  is designed for frequencies from 1 MHz to 7.2 GHz, tunable up to 8 GHz and features a two-stage superheterodyne architecture with 4 independent TX and RX channels capable of 400 MHz of instantaneous bandwidth each.  Digital interfaces for data offload and control include two QSFP28 interfaces capable of 100 GbE, a PCIe Gen3 x8 [1] interface, as well standard command, control, and debug interfaces: USB-C JTAG, USB-C console, Ethernet 10/100/1000. The USRP X410 is an all-in-one device built on the Xilinx Zynq Ultrascale+ ZU28DR RF System on Chip (RFSoC) with built-in digital up and down conversion and onboard Soft-Decision Forward Error Correction (SD-FEC) IP.

    Use the software of your choice 
    The NI Ettus USRP X410 is fully supported on the popular open-source USRP Hardware Driver (UHD) version 4.1 or later[2].  UHD 4.1 was designed to support the large data movement requirements imposed by the 400 MHz bandwidth and multiple channels onboard. The USRP X410 supports open-source SDR design flows such as C/C++ and GNU Radio, as well as LabVIEW FPGA [1]. Unlike other RFSoC-based systems, the USRP X410 is fully ready to port your previous UHD designs to take advantage of high-performance capabilities with a simple recompile.

    Networked / Stand-Alone Operation
    Since the USRP X410 is built on the ZU28DR RF System on Chip (RFSoC) device, it comes equipped with a quad-core ARM Cortex-A53 processing subsystem, clocked up to 1.2 GHz for stand-alone application requirements. Additionally, the RFSoC contains a dual-core ARM Cortex-R5 real-time processing unit for onboard monitoring and control.

    Built-In IP
    The onboard RFSoC on the USRP X410 contains more than twice the FPGA programmable logic resources than that of the previous generation X-series USRP devices. In addition, the ZU28DR comes with 8 soft-decision forward error correction (SD-FEC) hard IP cores, ideal for wireless communication systems. Given the high-speed nature of the built-in ADCs and DACs to the RFSoC, the Zynq device has 8 digital upconversion and digital down-conversion IP cores allowing for rapid in-band retuning or signal reduction.

    Multi-Radio Synchronization 
    Multi-radio clocking and timing synchronized operation is possible with the built-in GPSDO (GPS disciplined oscillator) or with the 10 MHz reference and 1 PPS (Pulse Per Second) input signal interfaces. Multi-Radio phase-aligned and phase-coherent operations are not supported, as RF chain LO import and export functionality is not supported on the USRP X410.

    [1] PCIe Gen3 x8 is only supported by NI-USRP and LabVIEW FPGA design flows
    [2] 100 GBE supported in UHD 4.2 or later

    Features

    • High channel density
    • Reliable and fault-tolerant deployment
    • Stand-alone (embedded) or host-based (network streaming) operation
    • Fully integrated and assembled (the USRP X410 does not support swappable daughtercards)
    • 1 MHz to 7.2 GHz frequency range (tunable up to 8GHz)
    • Up to 400 MHz of instantaneous bandwidth per channel
    • 4 RX, 4 TX in half-wide RU form factor
    • Xilinx Zynq-Ultrascale+ ZU28DR RFSoC
      • 12 bit ADC, 14 bit DAC
      • IQ Sample Clock rates up to 500 MS/s
      • Onboard SD-FEC, DDC, DUC
      • Quad-core ARM Cortex-A53 up to 1.2 GHz CPU
      • Dual-core ARM Cortex-A5 MPCore up to 500 MHz
    • Two QSFP28 ports (10 Gigabit Ethernet, 100 Gigabit Ethernet, Aurora)
    • Two iPass+™ zHD® Interfaces (PCIe Gen3 x 8)
    • RJ45 (1 GbE) [1]
    • 10 MHz Clock reference 
    • PPS time reference
    • Trig In/Out Interface
    • Built-in GPSDO 
    • Two FPGA Programmable GPIO Interfaces (HDMI)
    • 1 Type C USB host port 
    • 1 Type C USB port (serial console, JTAG) 
    • Watchdog timer
    • OpenEmbedded Linux
    • USRP Hardware Driver™ (UHD) open-source software API version 4.1.0 or later
    • RF Network on Chip (RFNoC™) FPGA development framework
    • Xilinx Vivado® 2019.1 Design Suite (license not included)
    • GNU Radio support is maintained by Ettus Research™ through GR-UHD, an interface to UHD distributed by GNU Radio

    [1] The RJ45 port is used for remote management of the device and does not support IQ streaming.

    Additional Resources

    Kit Contents

    • USRP X410
    • RJ45 Ethernet Cable
    • USB-C to USB-A cable
    • Power Supply

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